Various approaches have been taken in previous microprocessor designs to implement functionality that supports utilization of in-circuit emulators and other test equipment to debug and test microprocessor-based systems. Those implementations have provided certain controllability and observability features, but at the expense of additional transistors and package pins to provide those features (thus, extra silicon area, extra cost), and limitations in the operational frequency of the microprocessors while utilizing these debug features. In other words, in-circuit emulators to date have either been expensive, costly in terms of substrate area and/or pin count, only operable at frequencies which are slower than the normal speed of the processor, etc..
Motorola DSP56000 products include an On-Chip Emulation (OnCE) capability. OnCE provides an emulator with debug capabilities (for example, read and write internal registers, restart processor) to utilize in systems built around a DSP56000 device. The OnCE implementation strictly depends on a serial interface for communication between the in-circuit emulator and the DSP56000, operates at much less than full frequency of the part (1/8 frequency maximum), and requires dedicated pins on the DSP which then requires a larger package size.
Motorola CPU32 products have included Background Debug Mode (BDM), an internal debug mode implemented in microcode on these processors. BDM provides debug options such as viewing and/or altering internal registers, read or writing memory, and resetting peripherals. The BDM implementation also strictly depends on a serial interface for communication between the in-circuit emulator and the CPU32, operates at much less than full frequency of the part (1/2 frequency maximum), and requires dedicated pins on the microprocessor.
There have been examples of separate, operational extensions that have been implemented to microprocessor architectures external to the processor. These extensions have focused on expanding the capabilities of internal microprocessor software (i.e., operating systems) in the areas of system power reduction.
The System Management Mode (SMM) feature on various x86 microprocessors (386, 486, Pentium) from Intel, AMD, and Chips and Technologies, is an implementation of a separate, operational extension to the x86 microprocessor architecture, directed toward system power management and not to in-circuit emulation, testing, and debug operations.